SYMMDENRSDIG=disable, SYMMDMODERX=rx_w_swctrl, SYMMDMODETX=rx_w_swctrl, SYMMDDIVRSDIG=Divideby1
| SYMMDDIVRSDIG | SYMMDDIVRSDIG 0 (Divideby1): undefined 1 (Divideby2): undefined 2 (Divideby4): undefined 3 (Divideby8): undefined |
| SYMMDMODERX | SYMMDMODERX 0 (rx_w_swctrl): undefined 1 (rx_wo_swctrl): undefined 2 (qnc_dsm2): undefined 3 (qnc_dsm3): undefined 4 (rxlp_wo_swctrl): undefined 5 (notuse_5): undefined 6 (notuse_6): undefined 7 (notuse_7): undefined |
| SYMMDMODETX | SYMMDMODETX 0 (rx_w_swctrl): undefined 1 (rx_wo_swctrl): undefined 2 (qnc_dsm2): undefined 3 (qnc_dsm3): undefined 4 (rxlp_wo_swctrl): undefined 5 (notuse_5): undefined 6 (notuse_6): undefined 7 (notuse_7): undefined |
| SYMMDENRSDIG | SYMMDENRSDIG 0 (disable): undefined 1 (enable): undefined |